1. Field of the Invention
In general, the present invention relates to a video display apparatus such as an LCD. More particularly, the present invention relates to a video display apparatus capable of displaying video signals of a plurality of types having different specifications.
2. Description of the Related Art
It is necessary to provide an information terminal for future multimedia with a function for receiving a number of picture sources of different types. As a representative technique for implementing this function, there are known a method of processing a signal to be displayed in a display unit itself and a method of processing the signal in a signal processing unit. In the former method, a picture is displayed by setting a wide operating range of a deflection system of the display unit and carrying out scanning in a manner matching a signal format of an input picture. Implemented as a multiscan system, the former method is an effective technique that can be realized at a relatively low cost for a display unit of the CRT type. For a plane display unit such as an LCD or a PDP adopting sequential scanning and using a fixed number of display pixels, however, the former method raises a problem of application difficulties.
In the latter method, on the other hand, an input picture signal is subjected to signal processing such as IP conversion and format conversion. For this reason, the latter method is flexible in that it can be applied to not only a CRT but also a plane display unit such as an LCD and a PDP. However, the latter method requires a memory with a large capacity for signal processing such as interlaced-scanning/sequential-scanning conversion, frame-rate conversion and picture-size shrinkage/enlargement conversion.
Thus, there has been proposed a technique in the picture IP conversion whereby the number of sampling points in the signal processing of the sub-Nyquist sampling for an intensity signal is reduced by half and this signal series is stored in a memory. Then, a signal series read out from the memory is decoded to reproduce. an intensity signal with the original number of sampling points. Subsequently, with this intensity signal used as a base, a signal of an interpolation scan line is generated in a motion-adaptive interpolation process to reduce the size of the memory by half.
However, the method described above has a problem of a higher cost and increased power consumption due to a need for a memory with a large size.
It is an object of the present invention addressing the problems described above to provide a video display apparatus capable of displaying video signals of a plurality of types and different specifications without requiring a memory with a large size.
The present invention provides a video display apparatus for displaying an input video signal as video information in a display format different from a format of the input video signal on a display panel with a plurality of pixels laid out thereon to form a matrix. The video display apparatus comprises: a video-signal processing circuit for converting the input video signal into a digital signal and processing the digital signal obtained as a result of conversion; a PLL circuit for generating a clock signal for the video-signal processing circuit; a discrimination means for identifying a format of the input video signal from the input video signal; a specification means for specifying a format of video information to be displayed on the display panel; a diver-control-signal generation means for generating control signals for controlling a gate driver for driving the display panel and control signals for controlling a source driver also for driving the display panel in accordance with a format of video information to be displayed on the display panel; a driver-control-signal switching means for selecting one of the control signals generated by the driver-control-signal generation means for controlling the gate driver and selecting one of control signals generated by the driver-control-signal generation means for controlling the source driver in accordance with a format of the input video signal identified by the discrimination means and a display format specified by the specification means; and a PLL-signal control means for controlling the clock signal generated by the PLL circuit in accordance with a format of the input video signal identified by the discrimination means and a display format specified by the specification means.
As described above, in the video display apparatus provided by the present invention, a particular control signal generated by the driver-control-signal generation means for controlling the gate driver and EL particular control signal generated by the driver-control-signal generation means for controlling the source driver are selected in accordance with a format of the input video signal identified by the discrimination means and a display format specified by the specification means. In addition, the video-signal processing circuit carries out processing with the clock signal from the PLL circuit controlled by the PLL-signal control means in accordance with a format of the input video signal identified by the discrimination means and a display format specified by the specification means. As a result, it is possible to display the input video signal as video information in a display format different from a format of the input video signal on the display panel without using a memory with a large size.
According to an aspect of the video display apparatus, the discrimination means identifies a format of the input video signal from an aspect ratio of the input video signal and the number of scan lines of the input video signal. In this way, the discrimination means is capable of identifying a format of the input video signal from a synchronization signal of the input video signal. Thus, the video display apparatus is desirable in that the circuit configuration of the discrimination means is simple.
According to another aspect of the video display apparatus, the discrimination means is capable of determining whether the input video signal is a signal of an NTSC system, a signal of a PAL system or a signal of an HDTV system only from the number of scan lines in the vertical period.
According to still another aspect of the video display apparatus, the specification means specifies a format of video information to be displayed on the display panel from an aspect ratio of the input video signal or the number of scan lines of the input video signal. This method of specification is particularly effective for a case in which the only difference between the display format and the format of the input video signal is the aspect ratio or the number of scan lines.
According to a further aspect of the video display apparatus, the video-signal processing circuit carries out processing based on a clock signal having a first frequency for a video period of the digital signal and a frequency for periods other than the video period different from the first frequency. Thus, the video display apparatus is desirable in that all pixels of the display panel can be displayed within a limited period of time in case the number of effective display pixels in the input video signal is smaller than the number of pixels on the display panel.
According to a still further aspect of the video display apparatus, the source driver for driving the display panel is driven by a clock signal having a first frequency for a video period of the digital signal and a frequency for periods other than the video period different from the first frequency. Thus, the video display apparatus is desirable in that all pixels of the display panel can be displayed within a limited period of time in case the number of effective display pixels in the input video signal is smaller than the number of pixels on the display panel.